Field
The disclosed technology relates to the field of laterally diffused metal oxide semiconductor (LDMOS) devices. More specifically it relates to LDMOS devices implemented using FinFET technology.
Description of the Related Technology
High voltage applications such as microwave or RF power amplifiers require high voltage tolerant devices. Laterally diffused metal oxide semiconductor (LDMOS) transistors have a breakdown voltage which is higher than the breakdown voltage of a traditional FET. For example, the breakdown voltage of an LDMOS device may be above 12 V.
FIG. 1 illustrates a cross-section of a prior art LDMOS device with a P-well adjacent to an N-well, an N+ source region in the P-well and an N+ drain region in the N-well. A gate is present between the source region and the drain region. A shallow trench isolation (STI) region is present in the N-well between the source region and the drain region. In such LDMOS devices a drift region is created to withstand high electric fields. Moreover, by providing the STI region, the breakdown voltage of the LDMOS device can be increased.
These LDMOS devices may be implemented in FinFET technology. Care should be taken to design an LDMOS device which has a small ON resistance and which is resistant against electrostatic discharge (ESD). There is room for improvement in the design of high voltage tolerant LDMOS devices which are implemented using FinFET technology.